1. Field of the Invention
This invention relates to memory storage devices or memory cells for use in Random Access Memories (RAM's), and more particularly to a memory cell of the so-called injection logic type integrated circuit including a bistable circuit having a pair of switching transistors.
2. Prior Art
The present invention is an improvement over the prior art monolithic memory cell as disclosed in U.S. Pat. No. 3,815,106 issued June 4, 1974, to Sigfried Kurt Wiedmann.
Prior art memory cells usually require that each cell in the memory array have two power connections, which connections may be shared with adjacent cells. If, for example, the power connections also are used for row addressing, such connections can only be shared with other cells of the same row. This requirement of additional power connections to the memory cells increases the complixity of a memory array including a multiplicity of such memory cells. Such a prior art device is disclosed in U.S. Pat. No. 3,886,531, issued May 27, 1975, to Jon L. McNeill. The prior art memory cells will be described in greater detail under the Detailed Description hereinbelow.